Searched refs:SW_TWSI (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/i2c/busses/
H A Di2c-octeon.c34 #define SW_TWSI 0x00 macro
82 * The I2C core registers are accessed indirectly via the SW_TWSI CSR.
90 __raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI);
92 tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
103 * The I2C core registers are accessed indirectly via the SW_TWSI CSR.
109 __raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI);
111 tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/i2c/busses/
H A Di2c-octeon.c34 #define SW_TWSI 0x00 macro
82 * The I2C core registers are accessed indirectly via the SW_TWSI CSR.
90 __raw_writeq(SW_TWSI_V | eop_reg | data, i2c->twsi_base + SW_TWSI);
92 tmp = __raw_readq(i2c->twsi_base + SW_TWSI);
103 * The I2C core registers are accessed indirectly via the SW_TWSI CSR.
109 __raw_writeq(SW_TWSI_V | eop_reg | SW_TWSI_R, i2c->twsi_base + SW_TWSI);
111 tmp = __raw_readq(i2c->twsi_base + SW_TWSI);

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