Searched refs:SICA_SYSCR (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf561/include/mach/
H A DdefBF561.h32 #define SYSCR SICA_SYSCR
40 #define SICA_SYSCR 0xFFC00104 /* System Reset Configuration register */ macro
892 /* SICA_SYSCR Masks */
H A DcdefBF561.h42 #define bfin_read_SICA_SYSCR() bfin_read16(SICA_SYSCR)
43 #define bfin_write_SICA_SYSCR(val) bfin_write16(SICA_SYSCR,val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf561/include/mach/
H A DdefBF561.h32 #define SYSCR SICA_SYSCR
40 #define SICA_SYSCR 0xFFC00104 /* System Reset Configuration register */ macro
892 /* SICA_SYSCR Masks */
H A DcdefBF561.h42 #define bfin_read_SICA_SYSCR() bfin_read16(SICA_SYSCR)
43 #define bfin_write_SICA_SYSCR(val) bfin_write16(SICA_SYSCR,val)

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