Searched refs:SH_CACHE_UPDATED (Results 1 - 20 of 20) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/cpu-sh2/cpu/
H A Dcache.h16 #define SH_CACHE_UPDATED 2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/cpu-sh2/cpu/
H A Dcache.h16 #define SH_CACHE_UPDATED 2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/cpu-sh2a/cpu/
H A Dcache.h16 #define SH_CACHE_UPDATED 2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/cpu-sh3/cpu/
H A Dcache.h16 #define SH_CACHE_UPDATED 2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/cpu-sh2a/cpu/
H A Dcache.h16 #define SH_CACHE_UPDATED 2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/cpu-sh3/cpu/
H A Dcache.h16 #define SH_CACHE_UPDATED 2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/cpu-sh4/cpu/
H A Dcache.h16 #define SH_CACHE_UPDATED 2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/cpu-sh4/cpu/
H A Dcache.h16 #define SH_CACHE_UPDATED 2 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/cpu-sh5/cpu/
H A Dcache.h19 #define SH_CACHE_UPDATED (1LL<<57) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/cpu-sh5/cpu/
H A Dcache.h19 #define SH_CACHE_UPDATED (1LL<<57) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/kernel/cpu/sh3/
H A Dprobe.c34 __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
36 __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/kernel/cpu/sh3/
H A Dprobe.c34 __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
36 __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/mm/
H A Dcache-sh2a.c37 data &= ~SH_CACHE_UPDATED;
120 data &= ~SH_CACHE_UPDATED;
H A Dcache-sh7705.c49 int v = SH_CACHE_UPDATED | SH_CACHE_VALID;
120 data &= ~(SH_CACHE_VALID | SH_CACHE_UPDATED);
H A Dcache-sh2.c33 data &= ~SH_CACHE_UPDATED;
H A Dcache-sh3.c57 data &= ~SH_CACHE_UPDATED;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/mm/
H A Dcache-sh2a.c37 data &= ~SH_CACHE_UPDATED;
120 data &= ~SH_CACHE_UPDATED;
H A Dcache-sh7705.c49 int v = SH_CACHE_UPDATED | SH_CACHE_VALID;
120 data &= ~(SH_CACHE_VALID | SH_CACHE_UPDATED);
H A Dcache-sh2.c33 data &= ~SH_CACHE_UPDATED;
H A Dcache-sh3.c57 data &= ~SH_CACHE_UPDATED;

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