Searched refs:SDRAM (Results 1 - 25 of 49) sorted by relevance

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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pnx4008/
H A Dsleep.S4 * PNX4008 support for STOP mode and SDRAM self-refresh
40 @ setup SDRAM controller base address in r2
48 @ clear SDRAM self-refresh bit latch
50 @ clear SDRAM self-refresh bit
57 @ set SDRAM self-refresh bit
61 @ set SDRAM self-refresh bit latch
65 @ clear SDRAM self-refresh bit latch
69 @ clear SDRAM self-refresh bit
73 @ wait for SDRAM to get into self-refresh mode
78 @ to prepare SDRAM t
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pnx4008/
H A Dsleep.S4 * PNX4008 support for STOP mode and SDRAM self-refresh
40 @ setup SDRAM controller base address in r2
48 @ clear SDRAM self-refresh bit latch
50 @ clear SDRAM self-refresh bit
57 @ set SDRAM self-refresh bit
61 @ set SDRAM self-refresh bit latch
65 @ clear SDRAM self-refresh bit latch
69 @ clear SDRAM self-refresh bit
73 @ wait for SDRAM to get into self-refresh mode
78 @ to prepare SDRAM t
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s3c2410/
H A Dsleep.S52 orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
53 orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
64 streq r7, [ r4 ] @ SDRAM sleep command
65 streq r8, [ r5 ] @ SDRAM power-down config
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s3c2410/
H A Dsleep.S52 orr r7, r7, #S3C2410_REFRESH_SELF @ SDRAM sleep command
53 orr r8, r8, #S3C2410_MISCCR_SDSLEEP @ SDRAM power-down signals
64 streq r7, [ r4 ] @ SDRAM sleep command
65 streq r8, [ r5 ] @ SDRAM power-down config
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/arch-v10/lib/
H A Dhw_settings.S33 ; SDRAM or EDO DRAM?
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v10/lib/
H A Dhw_settings.S33 ; SDRAM or EDO DRAM?
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-at91/
H A Dpm.h6 * terminate self-refresh automatically on the next SDRAM access.
45 /* We manage both DDRAM/SDRAM controllers, we need more than one value to
82 #warning Assuming EB1 SDRAM controller is *NOT* used
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/frv/kernel/
H A Dcmode.S24 #define __addr_SDRAMC 0xfe000400 /* SDRAM controller regs */
25 #define SDRAMC_DSTS 0x28 /* SDRAM status */
26 #define SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is in self-refresh mode */
27 #define SDRAMC_DRCN 0x30 /* SDRAM refresh control */
28 #define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh mode */
76 # to access SDRAM and the internal resources.
106 # (6) Execute loading the dummy for SDRAM.
109 # (7) Set '1' to the DRCN.SR bit, and change SDRAM to the
144 # (14) Release the self-refresh of SDRAM.
H A Dhead-mmu-fr451.S40 # describe the position and layout of the SDRAM controller registers
44 # GR11 - displacement of 2nd SDRAM addr reg from GR14
45 # GR12 - displacement of 3rd SDRAM addr reg from GR14
46 # GR13 - displacement of 4th SDRAM addr reg from GR14
47 # GR14 - address of 1st SDRAM addr reg
48 # GR15 - amount to shift address by to match SDRAM addr reg
168 # determine the total SDRAM size
171 # GR25 - SDRAM size
183 sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value
225 # GR25 SDRAM siz
[all...]
H A Dhead-uc-fr401.S39 # describe the position and layout of the SDRAM controller registers
43 # GR11 - displacement of 2nd SDRAM addr reg from GR14
44 # GR12 - displacement of 3rd SDRAM addr reg from GR14
45 # GR13 - displacement of 4th SDRAM addr reg from GR14
46 # GR14 - address of 1st SDRAM addr reg
47 # GR15 - amount to shift address by to match SDRAM addr reg
173 # determine the total SDRAM size
176 # GR25 - SDRAM size
188 sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value
236 # GR25 SDRAM siz
[all...]
H A Dhead-uc-fr555.S38 # describe the position and layout of the SDRAM controller registers
42 # GR11 - displacement of 2nd SDRAM addr reg from GR14
43 # GR12 - displacement of 3rd SDRAM addr reg from GR14
44 # GR13 - displacement of 4th SDRAM addr reg from GR14
45 # GR14 - address of 1st SDRAM addr reg
46 # GR15 - amount to shift address by to match SDRAM addr reg
161 # determine the total SDRAM size
164 # GR25 - SDRAM size
176 sethi.p %hi(0xfff),gr17 ; unused SDRAM AMK value
220 # GR25 SDRAM siz
[all...]
H A Dsleep.S27 #define FR55X_SDRAMC_DSTS_SSI 0x00000002 /* indicates that the SDRAM is in self-refresh mode */
31 #define FR4XX_SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is in self-refresh mode */
33 #define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh mode */
135 # put SDRAM in self-refresh mode
143 # Execute dummy load from SDRAM
146 # put the SDRAM into self-refresh mode
152 # wait for SDRAM to reach self-refresh mode
183 # wake SDRAM from self-refresh mode
194 # wait for the SDRAM to stabilise
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-lpc32xx/
H A Dsuspend.S53 @ Wait for SDRAM busy status to go busy and then idle
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/frv/kernel/
H A Dcmode.S24 #define __addr_SDRAMC 0xfe000400 /* SDRAM controller regs */
25 #define SDRAMC_DSTS 0x28 /* SDRAM status */
26 #define SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is in self-refresh mode */
27 #define SDRAMC_DRCN 0x30 /* SDRAM refresh control */
28 #define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh mode */
76 # to access SDRAM and the internal resources.
106 # (6) Execute loading the dummy for SDRAM.
109 # (7) Set '1' to the DRCN.SR bit, and change SDRAM to the
144 # (14) Release the self-refresh of SDRAM.
H A Dhead-mmu-fr451.S40 # describe the position and layout of the SDRAM controller registers
44 # GR11 - displacement of 2nd SDRAM addr reg from GR14
45 # GR12 - displacement of 3rd SDRAM addr reg from GR14
46 # GR13 - displacement of 4th SDRAM addr reg from GR14
47 # GR14 - address of 1st SDRAM addr reg
48 # GR15 - amount to shift address by to match SDRAM addr reg
168 # determine the total SDRAM size
171 # GR25 - SDRAM size
183 sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value
225 # GR25 SDRAM siz
[all...]
H A Dhead-uc-fr401.S39 # describe the position and layout of the SDRAM controller registers
43 # GR11 - displacement of 2nd SDRAM addr reg from GR14
44 # GR12 - displacement of 3rd SDRAM addr reg from GR14
45 # GR13 - displacement of 4th SDRAM addr reg from GR14
46 # GR14 - address of 1st SDRAM addr reg
47 # GR15 - amount to shift address by to match SDRAM addr reg
173 # determine the total SDRAM size
176 # GR25 - SDRAM size
188 sethi.p %hi(0xfe000000),gr17 ; unused SDRAM DBR value
236 # GR25 SDRAM siz
[all...]
H A Dhead-uc-fr555.S38 # describe the position and layout of the SDRAM controller registers
42 # GR11 - displacement of 2nd SDRAM addr reg from GR14
43 # GR12 - displacement of 3rd SDRAM addr reg from GR14
44 # GR13 - displacement of 4th SDRAM addr reg from GR14
45 # GR14 - address of 1st SDRAM addr reg
46 # GR15 - amount to shift address by to match SDRAM addr reg
161 # determine the total SDRAM size
164 # GR25 - SDRAM size
176 sethi.p %hi(0xfff),gr17 ; unused SDRAM AMK value
220 # GR25 SDRAM siz
[all...]
H A Dsleep.S27 #define FR55X_SDRAMC_DSTS_SSI 0x00000002 /* indicates that the SDRAM is in self-refresh mode */
31 #define FR4XX_SDRAMC_DSTS_SSI 0x00000001 /* indicates that the SDRAM is in self-refresh mode */
33 #define SDRAMC_DRCN_SR 0x00000001 /* transition SDRAM into self-refresh mode */
135 # put SDRAM in self-refresh mode
143 # Execute dummy load from SDRAM
146 # put the SDRAM into self-refresh mode
152 # wait for SDRAM to reach self-refresh mode
183 # wake SDRAM from self-refresh mode
194 # wait for the SDRAM to stabilise
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-at91/
H A Dpm.h6 * terminate self-refresh automatically on the next SDRAM access.
45 /* We manage both DDRAM/SDRAM controllers, we need more than one value to
82 #warning Assuming EB1 SDRAM controller is *NOT* used
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-lpc32xx/
H A Dsuspend.S53 @ Wait for SDRAM busy status to go busy and then idle
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/
H A Dsleep.S187 @ prepare SDRAM refresh settings
191 @ enable SDRAM self-refresh mode
238 @ prepare SDRAM refresh settings
242 @ enable SDRAM self-refresh mode
249 @ We keep the change-down close to the actual suspend on SDRAM
302 @ external accesses after SDRAM is put in self-refresh mode
308 @ put SDRAM into self-refresh
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/
H A Dsleep.S187 @ prepare SDRAM refresh settings
191 @ enable SDRAM self-refresh mode
238 @ prepare SDRAM refresh settings
242 @ enable SDRAM self-refresh mode
249 @ We keep the change-down close to the actual suspend on SDRAM
302 @ external accesses after SDRAM is put in self-refresh mode
308 @ put SDRAM into self-refresh
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap1/
H A Dsleep.S76 @ prepare to put SDRAM into self-refresh manually
160 @ prepare to put SDRAM into self-refresh manually
229 @ Prepare to put SDRAM into self-refresh manually
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap1/
H A Dsleep.S76 @ prepare to put SDRAM into self-refresh manually
160 @ prepare to put SDRAM into self-refresh manually
229 @ Prepare to put SDRAM into self-refresh manually
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/video/aty/
H A Dmach64_ct.c351 else if (par->ram_type >= SDRAM)
468 case SDRAM:
542 if (M64_HAS(SDRAM_MAGIC_PLL) && (par->ram_type >= SDRAM))

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