Searched refs:SDCR0_SUS (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/
H A Dshannon.c73 Ser1SDCR0 |= SDCR0_SUS;
H A Dhackkit.c88 Ser1SDCR0 |= SDCR0_SUS;
H A Dassabet.c414 Ser1SDCR0 |= SDCR0_SUS;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/
H A Dshannon.c73 Ser1SDCR0 |= SDCR0_SUS;
H A Dhackkit.c88 Ser1SDCR0 |= SDCR0_SUS;
H A Dassabet.c414 Ser1SDCR0 |= SDCR0_SUS;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h432 #define SDCR0_SUS 0x00000001 /* SDLC/UART Select */ macro
433 #define SDCR0_SDLC (SDCR0_SUS*0) /* SDLC mode (TXD1 & RXD1) */
434 #define SDCR0_UART (SDCR0_SUS*1) /* UART mode (TXD1 & RXD1) */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h432 #define SDCR0_SUS 0x00000001 /* SDLC/UART Select */ macro
433 #define SDCR0_SDLC (SDCR0_SUS*0) /* SDLC mode (TXD1 & RXD1) */
434 #define SDCR0_UART (SDCR0_SUS*1) /* UART mode (TXD1 & RXD1) */

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