Searched refs:S5P_CLK_SRC1 (Results 1 - 14 of 14) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pc100/include/mach/
H A Dregs-clock.h33 #define S5P_CLK_SRC1 S5P_CLKREG(0x204) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pc100/include/mach/
H A Dregs-clock.h33 #define S5P_CLK_SRC1 S5P_CLKREG(0x204) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6440/include/mach/
H A Dregs-clock.h40 #define S5P_CLK_SRC1 S5P_CLKREG(0x10C) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6442/include/mach/
H A Dregs-clock.h31 #define S5P_CLK_SRC1 S5P_CLKREG(0x204) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6440/include/mach/
H A Dregs-clock.h40 #define S5P_CLK_SRC1 S5P_CLKREG(0x10C) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6442/include/mach/
H A Dregs-clock.h31 #define S5P_CLK_SRC1 S5P_CLKREG(0x204) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv210/
H A Dclock.c240 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 28, .size = 1 },
522 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 },
552 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
745 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
793 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 4 },
803 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 4 },
813 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 },
893 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv210/
H A Dclock.c240 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 28, .size = 1 },
522 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 },
552 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
745 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
793 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 4 },
803 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 4 },
813 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 },
893 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pc100/
H A Dclock.c72 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 1 },
957 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
968 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
979 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
990 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
1132 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 2 },
1154 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 2 },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pc100/
H A Dclock.c72 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 1 },
957 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
968 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
979 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
990 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
1132 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 2 },
1154 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 2 },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv210/include/mach/
H A Dregs-clock.h31 #define S5P_CLK_SRC1 S5P_CLKREG(0x204) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv210/include/mach/
H A Dregs-clock.h31 #define S5P_CLK_SRC1 S5P_CLKREG(0x204) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6440/
H A Dclock.c716 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
726 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
736 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 3 },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6440/
H A Dclock.c716 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
726 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
736 .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 3 },

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