Searched refs:S5P_CLK_DIV4 (Results 1 - 10 of 10) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pc100/include/mach/ |
| H A D | regs-clock.h | 41 #define S5P_CLK_DIV4 S5P_CLKREG(0x310) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pc100/include/mach/ |
| H A D | regs-clock.h | 41 #define S5P_CLK_DIV4 S5P_CLKREG(0x310) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5p6442/include/mach/ |
| H A D | regs-clock.h | 45 #define S5P_CLK_DIV4 S5P_CLKREG(0x310) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5p6442/include/mach/ |
| H A D | regs-clock.h | 45 #define S5P_CLK_DIV4 S5P_CLKREG(0x310) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv210/ |
| H A D | clock.c | 706 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
716 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
726 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 },
736 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
824 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
834 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
844 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
854 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv210/ |
| H A D | clock.c | 706 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
716 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
726 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 },
736 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 },
824 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 },
834 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 },
844 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 },
854 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv210/include/mach/ |
| H A D | regs-clock.h | 45 #define S5P_CLK_DIV4 S5P_CLKREG(0x310) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv210/include/mach/ |
| H A D | regs-clock.h | 45 #define S5P_CLK_DIV4 S5P_CLKREG(0x310) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pc100/ |
| H A D | clock.c | 1012 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
1023 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
1034 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
1144 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 3 },
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pc100/ |
| H A D | clock.c | 1012 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 },
1023 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
1034 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 },
1144 .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 3 },
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