Searched refs:S5P_CLKDIV_CPU (Results 1 - 4 of 4) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv310/ |
H A D | clock.c | 60 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 }, 106 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 0, .size = 3 }, 123 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 }, 132 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 }, 141 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 8, .size = 3 }, 150 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 12, .size = 3 }, 159 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 16, .size = 3 }, 168 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 20, .size = 3 },
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv310/ |
H A D | clock.c | 60 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 }, 106 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 0, .size = 3 }, 123 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 }, 132 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 }, 141 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 8, .size = 3 }, 150 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 12, .size = 3 }, 159 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 16, .size = 3 }, 168 .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 20, .size = 3 },
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-s5pv310/include/mach/ |
H A D | regs-clock.h | 58 #define S5P_CLKDIV_CPU S5P_CLKREG(0x14500) macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-s5pv310/include/mach/ |
H A D | regs-clock.h | 58 #define S5P_CLKDIV_CPU S5P_CLKREG(0x14500) macro
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