/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/opcodes/ |
H A D | i370-opc.c | 323 #define RRF_MASK RRF (0xffff, 0x0, 0x0, 0x0) 653 { "cfdbr", 4, {{RRF(0xb399,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 654 { "cfdr", 4, {{RRF(0xb3b9,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 655 { "cfebr", 4, {{RRF(0xb398,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 656 { "cfer", 4, {{RRF(0xb3b8,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 657 { "cfxbr", 4, {{RRF(0xb39a,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 658 { "cfxr", 4, {{RRF(0xb3ba,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 659 { "didbr", 4, {{RRF(0xb35b,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 660 { "diebr", 4, {{RRF(0xb353,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 661 { "fidbr", 4, {{RRF(0xb35f,0,0,0), 0}}, {{RRF_MASK, 319 #define RRF_MASK macro [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/opcodes/ |
H A D | i370-opc.c | 323 #define RRF_MASK RRF (0xffff, 0x0, 0x0, 0x0) 653 { "cfdbr", 4, {{RRF(0xb399,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 654 { "cfdr", 4, {{RRF(0xb3b9,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 655 { "cfebr", 4, {{RRF(0xb398,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 656 { "cfer", 4, {{RRF(0xb3b8,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 657 { "cfxbr", 4, {{RRF(0xb39a,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 658 { "cfxr", 4, {{RRF(0xb3ba,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 659 { "didbr", 4, {{RRF(0xb35b,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 660 { "diebr", 4, {{RRF(0xb353,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 661 { "fidbr", 4, {{RRF(0xb35f,0,0,0), 0}}, {{RRF_MASK, 319 #define RRF_MASK macro [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/opcodes/ |
H A D | i370-opc.c | 323 #define RRF_MASK RRF (0xffff, 0x0, 0x0, 0x0) 653 { "cfdbr", 4, {{RRF(0xb399,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 654 { "cfdr", 4, {{RRF(0xb3b9,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 655 { "cfebr", 4, {{RRF(0xb398,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 656 { "cfer", 4, {{RRF(0xb3b8,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 657 { "cfxbr", 4, {{RRF(0xb39a,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 658 { "cfxr", 4, {{RRF(0xb3ba,0,0,0), 0}}, {{RRF_MASK, 0}}, IHX, {RRF_R1, RRF_R3, RRF_R2} }, 659 { "didbr", 4, {{RRF(0xb35b,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 660 { "diebr", 4, {{RRF(0xb353,0,0,0), 0}}, {{RRF_MASK, 0}}, IBF, {RRF_R1, RRF_R3, RRF_R2} }, 661 { "fidbr", 4, {{RRF(0xb35f,0,0,0), 0}}, {{RRF_MASK, 319 #define RRF_MASK macro [all...] |