Searched refs:REG_WR_INT_VECT (Results 1 - 25 of 134) sorted by relevance

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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/include/arch-v32/arch/hwregs/iop/
H A Diop_version_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_crc_par_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_fifo_in_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_fifo_in_extra_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_fifo_out_extra_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_mpu_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sap_in_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_scrc_in_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_scrc_out_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_trigger_grp_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/include/arch-v32/arch/hwregs/
H A Dirq_nmi_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Dstrcop_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Data_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Dconfig_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Dmarb_bp_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Drt_trace_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
H A Diop_version_defs.h56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
H A Dstrmux_defs.h56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/include/arch-v32/arch/hwregs/iop/
H A Diop_version_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/include/arch-v32/arch/hwregs/
H A Dirq_nmi_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
H A Dstrcop_defs.h59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
H A Diop_version_defs.h56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
H A Dstrmux_defs.h56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/arch-v32/kernel/
H A Dirq.c215 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
221 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
239 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
245 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
415 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask);
448 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/cris/arch-v32/kernel/
H A Dirq.c215 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
221 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
239 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
245 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask,
415 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask);
448 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask);

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