Searched refs:REG_CLKDIV (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-w90x900/include/mach/
H A Dregs-clock.h21 #define REG_CLKDIV (CLK_BA + 0x08) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-nuc93x/include/mach/
H A Dregs-clock.h21 #define REG_CLKDIV (CLK_BA + 0x08) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-w90x900/include/mach/
H A Dregs-clock.h21 #define REG_CLKDIV (CLK_BA + 0x08) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-nuc93x/include/mach/
H A Dregs-clock.h21 #define REG_CLKDIV (CLK_BA + 0x08) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-w90x900/
H A Dcpu.c164 val = __raw_readl(REG_CLKDIV);
167 __raw_writel(val, REG_CLKDIV);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-w90x900/
H A Dcpu.c164 val = __raw_readl(REG_CLKDIV);
167 __raw_writel(val, REG_CLKDIV);

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