Searched refs:REG2 (Results 1 - 20 of 20) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sparc/include/asm/
H A Dtsb.h98 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \
99 661: casa [TSB] ASI_N, REG1, REG2; \
102 casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
105 #define TSB_CAS_TAG(TSB, REG1, REG2) \
106 661: casxa [TSB] ASI_N, REG1, REG2; \
109 casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
119 #define TSB_LOCK_TAG(TSB, REG1, REG2) \
121 sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\
122 andcc REG1, REG2, %g0; \
125 TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \
[all...]
H A Dtrap_block.h166 * area base of the current processor into DEST. REG1, REG2, and REG3 are
174 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \
176 sethi %hi(trap_block), REG2; \
178 or REG2, %lo(trap_block), REG2; \
179 add REG2, REG1, REG2; \
180 ldx [REG2 + TRAP_PER_CPU_PER_CPU_BASE], DEST;
203 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sparc/include/asm/
H A Dtsb.h98 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \
99 661: casa [TSB] ASI_N, REG1, REG2; \
102 casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
105 #define TSB_CAS_TAG(TSB, REG1, REG2) \
106 661: casxa [TSB] ASI_N, REG1, REG2; \
109 casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \
119 #define TSB_LOCK_TAG(TSB, REG1, REG2) \
121 sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\
122 andcc REG1, REG2, %g0; \
125 TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \
[all...]
H A Dtrap_block.h166 * area base of the current processor into DEST. REG1, REG2, and REG3 are
174 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \
176 sethi %hi(trap_block), REG2; \
178 or REG2, %lo(trap_block), REG2; \
179 add REG2, REG1, REG2; \
180 ldx [REG2 + TRAP_PER_CPU_PER_CPU_BASE], DEST;
203 #define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m32r/kernel/
H A Dalign.c39 #define REG2(insn) ((insn) & 0x000f) macro
106 int src = REG2(insn);
124 val += (unsigned int)get_reg(regs, REG2(insn));
142 val &= get_reg(regs, REG2(insn));
150 if (get_reg(regs, REG1(insn)) < get_reg(regs, REG2(insn)))
160 if (get_reg(regs, REG1(insn)) == get_reg(regs, REG2(insn)))
171 < (unsigned int)get_reg(regs, REG2(insn)))
181 if (!get_reg(regs, REG2(insn)))
193 val = get_reg(regs, REG2(insn));
203 val = get_reg(regs, REG2(ins
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m32r/kernel/
H A Dalign.c39 #define REG2(insn) ((insn) & 0x000f) macro
106 int src = REG2(insn);
124 val += (unsigned int)get_reg(regs, REG2(insn));
142 val &= get_reg(regs, REG2(insn));
150 if (get_reg(regs, REG1(insn)) < get_reg(regs, REG2(insn)))
160 if (get_reg(regs, REG1(insn)) == get_reg(regs, REG2(insn)))
171 < (unsigned int)get_reg(regs, REG2(insn)))
181 if (!get_reg(regs, REG2(insn)))
193 val = get_reg(regs, REG2(insn));
203 val = get_reg(regs, REG2(ins
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/ffmpeg/libavcodec/x86/
H A Didct_sse2_xvid.c112 # define REG2 ROW2 macro
121 # define SREG2 REG2
130 # define REG2 "%%xmm4" macro
233 MOV_32_ONLY ROW2", "REG2" \n\t" \
237 "pmulhw "REG2", %%xmm5 \n\t" \
238 "paddsw "REG2", %%xmm7 \n\t" \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/ffmpeg/libavcodec/x86/
H A Didct_sse2_xvid.c112 # define REG2 ROW2 macro
121 # define SREG2 REG2
130 # define REG2 "%%xmm4" macro
233 MOV_32_ONLY ROW2", "REG2" \n\t" \
237 "pmulhw "REG2", %%xmm5 \n\t" \
238 "paddsw "REG2", %%xmm7 \n\t" \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/ffmpeg/libavcodec/x86/
H A Didct_sse2_xvid.c112 # define REG2 ROW2 macro
121 # define SREG2 REG2
130 # define REG2 "%%xmm4" macro
233 MOV_32_ONLY ROW2", "REG2" \n\t" \
237 "pmulhw "REG2", %%xmm5 \n\t" \
238 "paddsw "REG2", %%xmm7 \n\t" \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sparc/kernel/
H A Dsys32.S22 #define SIGN2(STUB,SYSCALL,REG1,REG2) \
28 sra REG2, 0, REG2
30 #define SIGN3(STUB,SYSCALL,REG1,REG2,REG3) \
35 sra REG2, 0, REG2; \
39 #define SIGN4(STUB,SYSCALL,REG1,REG2,REG3,REG4) \
44 sra REG2, 0, REG2; \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sparc/kernel/
H A Dsys32.S22 #define SIGN2(STUB,SYSCALL,REG1,REG2) \
28 sra REG2, 0, REG2
30 #define SIGN3(STUB,SYSCALL,REG1,REG2,REG3) \
35 sra REG2, 0, REG2; \
39 #define SIGN4(STUB,SYSCALL,REG1,REG2,REG3,REG4) \
44 sra REG2, 0, REG2; \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/
H A Deepro.c437 #define REG2 0x02 macro
1012 temp_reg = inb(ioaddr + REG2); /* Match broadcast */
1013 outb(temp_reg | 0x14, ioaddr + REG2);
1290 mode = inb(ioaddr + REG2);
1291 outb(mode | PRMSC_Mode, ioaddr + REG2);
1300 mode = inb(ioaddr + REG2);
1301 outb(mode & 0xd6, ioaddr + REG2); /* Turn off Multi-IA and PRMSC_Mode bits */
1318 mode = inb(ioaddr + REG2);
1319 outb(mode | Multi_IA, ioaddr + REG2);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/
H A Deepro.c437 #define REG2 0x02 macro
1012 temp_reg = inb(ioaddr + REG2); /* Match broadcast */
1013 outb(temp_reg | 0x14, ioaddr + REG2);
1290 mode = inb(ioaddr + REG2);
1291 outb(mode | PRMSC_Mode, ioaddr + REG2);
1300 mode = inb(ioaddr + REG2);
1301 outb(mode & 0xd6, ioaddr + REG2); /* Turn off Multi-IA and PRMSC_Mode bits */
1318 mode = inb(ioaddr + REG2);
1319 outb(mode | Multi_IA, ioaddr + REG2);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/opcodes/
H A Dcrx-opc.c516 #define COP_INST(NAME, OPC, TYPE, REG1, REG2) \
517 /* opc12 c4 opc8 REG1 REG2 */ \
518 {NAME, 2, 0x301030+OPC, 8, TYPE | FMT_2, {{ui4,16}, {REG1,4}, {REG2,0}}}
520 #define REV_COP_INST(NAME, OPC, TYPE, REG1, REG2) \
521 /* opc12 c4 opc8 REG2 REG1 */ \
522 {NAME, 2, 0x301030+OPC, 8, TYPE | FMT_2, {{ui4,16}, {REG1,0}, {REG2,4}}}
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/opcodes/
H A Dcrx-opc.c516 #define COP_INST(NAME, OPC, TYPE, REG1, REG2) \
517 /* opc12 c4 opc8 REG1 REG2 */ \
518 {NAME, 2, 0x301030+OPC, 8, TYPE | FMT_2, {{ui4,16}, {REG1,4}, {REG2,0}}}
520 #define REV_COP_INST(NAME, OPC, TYPE, REG1, REG2) \
521 /* opc12 c4 opc8 REG2 REG1 */ \
522 {NAME, 2, 0x301030+OPC, 8, TYPE | FMT_2, {{ui4,16}, {REG1,0}, {REG2,4}}}
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/opcodes/
H A Dcrx-opc.c516 #define COP_INST(NAME, OPC, TYPE, REG1, REG2) \
517 /* opc12 c4 opc8 REG1 REG2 */ \
518 {NAME, 2, 0x301030+OPC, 8, TYPE | FMT_2, {{ui4,16}, {REG1,4}, {REG2,0}}}
520 #define REV_COP_INST(NAME, OPC, TYPE, REG1, REG2) \
521 /* opc12 c4 opc8 REG2 REG1 */ \
522 {NAME, 2, 0x301030+OPC, 8, TYPE | FMT_2, {{ui4,16}, {REG1,0}, {REG2,4}}}
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/sound/sparc/
H A Ddbri.c240 #define REG2 0x08 /* Parallel IO */ macro
731 sbus_readl(dbri->regs + REG2),
1405 (dbri->mm.onboard ? D_PIO0 : D_PIO2), dbri->regs + REG2);
1451 sbus_writel(val, dbri->regs + REG2);
1595 u32 reg2 = sbus_readl(dbri->regs + REG2);
1610 sbus_writel(D_ENPIO2, dbri->regs + REG2);
2418 snd_iprintf(buffer, "REG2: 0x%x\n", sbus_readl(dbri->regs + REG2));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/sound/sparc/
H A Ddbri.c240 #define REG2 0x08 /* Parallel IO */ macro
731 sbus_readl(dbri->regs + REG2),
1405 (dbri->mm.onboard ? D_PIO0 : D_PIO2), dbri->regs + REG2);
1451 sbus_writel(val, dbri->regs + REG2);
1595 u32 reg2 = sbus_readl(dbri->regs + REG2);
1610 sbus_writel(D_ENPIO2, dbri->regs + REG2);
2418 snd_iprintf(buffer, "REG2: 0x%x\n", sbus_readl(dbri->regs + REG2));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/scsi/aic94xx/
H A Daic94xx_dump.c362 PRINT_MIS_dword(asd_ha, REG2);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/scsi/aic94xx/
H A Daic94xx_dump.c362 PRINT_MIS_dword(asd_ha, REG2);

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