Searched refs:RB_CTRL (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/
H A Dskge.c2487 skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
2503 skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
2506 skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
2623 skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL),
2660 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
2674 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
2677 skge_write8(hw, RB_ADDR(port == 0 ? Q_XA1 : Q_XA2, RB_CTRL), RB_RST_SET);
H A Dsky2.c966 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
989 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
992 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
993 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
1253 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1602 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1934 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1951 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
2291 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
H A Dsky2.h796 RB_CTRL = 0x28,/* 32 bit RAM Buffer Control Register */ enumerator in enum:__anon17181
961 /* RB_CTRL 8 bit RAM Buffer Control Register */
H A Dskge.h496 RB_CTRL = 0x28,/* 32 bit RAM Buffer Control Register */ enumerator in enum:__anon17044
770 /* RB_CTRL 8 bit RAM Buffer Control Register */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/
H A Dskge.c2487 skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
2503 skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
2506 skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
2623 skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL),
2660 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
2674 skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
2677 skge_write8(hw, RB_ADDR(port == 0 ? Q_XA1 : Q_XA2, RB_CTRL), RB_RST_SET);
H A Dsky2.c966 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
989 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
992 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
993 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
1253 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1602 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1934 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1951 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
2291 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
H A Dsky2.h796 RB_CTRL = 0x28,/* 32 bit RAM Buffer Control Register */ enumerator in enum:__anon28874
961 /* RB_CTRL 8 bit RAM Buffer Control Register */
H A Dskge.h496 RB_CTRL = 0x28,/* 32 bit RAM Buffer Control Register */ enumerator in enum:__anon28737
770 /* RB_CTRL 8 bit RAM Buffer Control Register */

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