Searched refs:PXA_CS3_PHYS (Results 1 - 22 of 22) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/include/mach/
H A Dtrizeps4.h17 #define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */
21 #define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS)
23 #define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000)
25 #define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000)
27 #define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000)
29 #define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000)
H A Dlubbock.h13 #define LUBBOCK_ETH_PHYS PXA_CS3_PHYS
H A Dviper.h27 #define VIPER_USB_PHYS PXA_CS3_PHYS
H A Didp.h29 #define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS)
H A Dpxa2xx-regs.h26 #define PXA_CS3_PHYS 0x0C000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/include/mach/
H A Dtrizeps4.h17 #define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */
21 #define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS)
23 #define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000)
25 #define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000)
27 #define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000)
29 #define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000)
H A Dviper.h27 #define VIPER_USB_PHYS PXA_CS3_PHYS
H A Dlubbock.h13 #define LUBBOCK_ETH_PHYS PXA_CS3_PHYS
H A Didp.h29 #define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS)
H A Dpxa2xx-regs.h26 #define PXA_CS3_PHYS 0x0C000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/
H A Dxcep.c37 #define XCEP_ETH_PHYS (PXA_CS3_PHYS + 0x00000300)
38 #define XCEP_ETH_PHYS_END (PXA_CS3_PHYS + 0x000fffff)
39 #define XCEP_ETH_ATTR (PXA_CS3_PHYS + 0x02000000)
40 #define XCEP_ETH_ATTR_END (PXA_CS3_PHYS + 0x020fffff)
H A Dvpac270.c599 .start = PXA_CS3_PHYS + 0x120,
600 .end = PXA_CS3_PHYS + 0x13f,
604 .start = PXA_CS3_PHYS + 0x15c,
605 .end = PXA_CS3_PHYS + 0x15f,
609 .start = PXA_CS3_PHYS + 0x20,
610 .end = PXA_CS3_PHYS + 0x2f,
H A Dcsb726.c212 .start = PXA_CS3_PHYS,
213 .end = PXA_CS3_PHYS + SZ_64K - 1,
H A Dmagician.c182 .start = PXA_CS3_PHYS,
183 .end = PXA_CS3_PHYS + 0x20 - 1,
742 cpld = ioremap_nocache(PXA_CS3_PHYS, 0x1000);
H A Dhx4700.c57 #define ASIC3_PHYS PXA_CS3_PHYS
58 #define ASIC3_SD_PHYS (PXA_CS3_PHYS + 0x02000000)
H A Dspitz.c778 .start = PXA_CS3_PHYS,
779 .end = PXA_CS3_PHYS + SZ_4K - 1,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/
H A Dxcep.c37 #define XCEP_ETH_PHYS (PXA_CS3_PHYS + 0x00000300)
38 #define XCEP_ETH_PHYS_END (PXA_CS3_PHYS + 0x000fffff)
39 #define XCEP_ETH_ATTR (PXA_CS3_PHYS + 0x02000000)
40 #define XCEP_ETH_ATTR_END (PXA_CS3_PHYS + 0x020fffff)
H A Dvpac270.c599 .start = PXA_CS3_PHYS + 0x120,
600 .end = PXA_CS3_PHYS + 0x13f,
604 .start = PXA_CS3_PHYS + 0x15c,
605 .end = PXA_CS3_PHYS + 0x15f,
609 .start = PXA_CS3_PHYS + 0x20,
610 .end = PXA_CS3_PHYS + 0x2f,
H A Dcsb726.c212 .start = PXA_CS3_PHYS,
213 .end = PXA_CS3_PHYS + SZ_64K - 1,
H A Dmagician.c182 .start = PXA_CS3_PHYS,
183 .end = PXA_CS3_PHYS + 0x20 - 1,
742 cpld = ioremap_nocache(PXA_CS3_PHYS, 0x1000);
H A Dspitz.c778 .start = PXA_CS3_PHYS,
779 .end = PXA_CS3_PHYS + SZ_4K - 1,
H A Dhx4700.c57 #define ASIC3_PHYS PXA_CS3_PHYS
58 #define ASIC3_SD_PHYS (PXA_CS3_PHYS + 0x02000000)

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