Searched refs:PLL_BYPASS (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-common/
H A Dclocks-init.c21 (PLL_BYPASS << 8) | (ANOMALY_05000305 ? 0 : 0x8000))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-common/
H A Dclocks-init.c21 (PLL_BYPASS << 8) | (ANOMALY_05000305 ? 0 : 0x8000))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/include/asm/
H A Dmem_init.h270 #define PLL_BYPASS 1 macro
272 #define PLL_BYPASS 0 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/include/asm/
H A Dmem_init.h270 #define PLL_BYPASS 1 macro
272 #define PLL_BYPASS 0 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-gemini/include/mach/
H A Dglobal_reg.h87 #define PLL_BYPASS (1 << 31) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-gemini/include/mach/
H A Dglobal_reg.h87 #define PLL_BYPASS (1 << 31) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/media/video/
H A Dov772x.c239 #define PLL_BYPASS 0x00 /* 00: Bypass PLL */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/media/video/
H A Dov772x.c239 #define PLL_BYPASS 0x00 /* 00: Bypass PLL */ macro

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