Searched refs:PLD_CFBUFCR (Results 1 - 12 of 12) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m32r/include/asm/mappi2/
H A Dmappi2_pld.h31 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m32r/include/asm/mappi3/
H A Dmappi3_pld.h31 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m32r/include/asm/mappi2/
H A Dmappi2_pld.h31 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m32r/include/asm/mappi3/
H A Dmappi3_pld.h31 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/pcmcia/
H A Dm32r_cfc.c418 pcc_set(sock, (unsigned int)PLD_CFBUFCR,0);/* enable buffer */
437 pcc_set(sock, (unsigned int)PLD_CFBUFCR,0); /* force buffer off for ZA-36 */
442 pcc_set(sock, (unsigned int)PLD_CFBUFCR,0);
492 pcc_set(sock,(unsigned int)PLD_CFBUFCR,0);
494 pcc_set(sock,(unsigned int)PLD_CFBUFCR,1);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/pcmcia/
H A Dm32r_cfc.c418 pcc_set(sock, (unsigned int)PLD_CFBUFCR,0);/* enable buffer */
437 pcc_set(sock, (unsigned int)PLD_CFBUFCR,0); /* force buffer off for ZA-36 */
442 pcc_set(sock, (unsigned int)PLD_CFBUFCR,0);
492 pcc_set(sock,(unsigned int)PLD_CFBUFCR,0);
494 pcc_set(sock,(unsigned int)PLD_CFBUFCR,1);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m32r/include/asm/m32104ut/
H A Dm32104ut_pld.h43 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m32r/include/asm/m32104ut/
H A Dm32104ut_pld.h43 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m32r/include/asm/m32700ut/
H A Dm32700ut_pld.h41 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m32r/include/asm/opsput/
H A Dopsput_pld.h37 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m32r/include/asm/m32700ut/
H A Dm32700ut_pld.h41 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m32r/include/asm/opsput/
H A Dopsput_pld.h37 #define PLD_CFBUFCR __reg16(PLD_BASE + 0x0006) macro

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