Searched refs:PDAUDIOCF_REG_SCR (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf_core.c40 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
50 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
71 while (inw(chip->port + PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
88 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
91 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
94 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
97 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
101 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
111 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, chip->suspend_reg_scr);
124 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
[all...]
H A Dpdaudiocf_pcm.c82 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
92 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, tmp);
144 val = nval = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
176 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, nval);
H A Dpdaudiocf.h38 #define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */ macro
47 /* PDAUDIOCF_REG_SCR */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf_core.c40 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
50 while (pdacf_reg_read(chip, PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
71 while (inw(chip->port + PDAUDIOCF_REG_SCR) & PDAUDIOCF_AK_SBP) {
88 val = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
91 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
94 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
97 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
101 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, val);
111 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, chip->suspend_reg_scr);
124 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
[all...]
H A Dpdaudiocf_pcm.c82 tmp = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
92 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, tmp);
144 val = nval = pdacf_reg_read(chip, PDAUDIOCF_REG_SCR);
176 pdacf_reg_write(chip, PDAUDIOCF_REG_SCR, nval);
H A Dpdaudiocf.h38 #define PDAUDIOCF_REG_SCR 0x08 /* status and control, R/W (see bit description) */ macro
47 /* PDAUDIOCF_REG_SCR */

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