Searched refs:PCI_LATENCY_CACHELINE (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/firewire/
H A Dnosy.h12 #define PCI_LATENCY_CACHELINE 0x0c macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/firewire/
H A Dnosy.h12 #define PCI_LATENCY_CACHELINE 0x0c macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/ieee1394/
H A Dpcilynx.h149 #define PCI_LATENCY_CACHELINE 0x0c macro
H A Dpcilynx.c1241 i = reg_read(lynx, PCI_LATENCY_CACHELINE) & 0xff;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/ieee1394/
H A Dpcilynx.h149 #define PCI_LATENCY_CACHELINE 0x0c macro
H A Dpcilynx.c1241 i = reg_read(lynx, PCI_LATENCY_CACHELINE) & 0xff;

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