Searched refs:OSMR0 (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/include/mach/
H A Dregs-ost.h10 #define OSMR0 __REG(0x40A00000) /* */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/
H A Dtime.c42 OSMR0 = next;
122 osmr[0] = OSMR0;
132 OSMR0 = osmr[0];
139 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
141 OSCR = OSMR0 - LATCH;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/
H A Dtime.c42 OSMR0 = next;
122 osmr[0] = OSMR0;
132 OSMR0 = osmr[0];
139 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
141 OSCR = OSMR0 - LATCH;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/include/mach/
H A Dregs-ost.h10 #define OSMR0 __REG(0x40A00000) /* */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/
H A Dtime.c83 OSMR0 = next;
172 osmr[0] = OSMR0;
185 * the one-shot timer interrupt. We adjust OSMR0 in preference
191 OSMR0 = osmr[0];
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/
H A Dtime.c83 OSMR0 = next;
172 osmr[0] = OSMR0;
185 * the one-shot timer interrupt. We adjust OSMR0 in preference
191 OSMR0 = osmr[0];
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h800 * OSMR0 Operating System (OS) timer Match Register 0
818 #define OSMR0 __REG(0x90000000) /* OS timer Match Reg. 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h800 * OSMR0 Operating System (OS) timer Match Register 0
818 #define OSMR0 __REG(0x90000000) /* OS timer Match Reg. 0 */ macro

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