Searched refs:NV40_PFIFO_CACHE1_PUSH1_DMA (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/gpu/drm/nouveau/
H A Dnv40_fifo.c140 NV40_PFIFO_CACHE1_PUSH1_DMA | chan->id);
194 NV40_PFIFO_CACHE1_PUSH1_DMA | (pfifo->channels - 1));
H A Dnouveau_reg.h477 #define NV40_PFIFO_CACHE1_PUSH1_DMA (1<<16) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/nouveau/
H A Dnv40_fifo.c140 NV40_PFIFO_CACHE1_PUSH1_DMA | chan->id);
194 NV40_PFIFO_CACHE1_PUSH1_DMA | (pfifo->channels - 1));
H A Dnouveau_reg.h477 #define NV40_PFIFO_CACHE1_PUSH1_DMA (1<<16) macro

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