Searched refs:M_MI0_PHY_REG_ADDR (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/chelsio/
H A Dfpga_defs.h88 #define M_MI0_PHY_REG_ADDR 0x1f macro
90 #define G_MI0_PHY_REG_ADDR(x) (((x) >> S_MI0_PHY_REG_ADDR) & M_MI0_PHY_REG_ADDR)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/chelsio/
H A Dfpga_defs.h88 #define M_MI0_PHY_REG_ADDR 0x1f macro
90 #define G_MI0_PHY_REG_ADDR(x) (((x) >> S_MI0_PHY_REG_ADDR) & M_MI0_PHY_REG_ADDR)

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