Searched refs:MX31_AIPS2_BASE_ADDR (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-mxc/include/mach/
H A Dmx31.h57 #define MX31_AIPS2_BASE_ADDR 0x53f00000 macro
60 #define MX31_CCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x80000)
61 #define MX31_CSPI3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x84000)
62 #define MX31_FIRI_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x8c000)
63 #define MX31_GPT1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x90000)
64 #define MX31_EPIT1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x94000)
65 #define MX31_EPIT2_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x98000)
66 #define MX31_GPIO3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xa4000)
67 #define MX31_SCC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xac000)
68 #define MX31_SCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-mxc/include/mach/
H A Dmx31.h57 #define MX31_AIPS2_BASE_ADDR 0x53f00000 macro
60 #define MX31_CCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x80000)
61 #define MX31_CSPI3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x84000)
62 #define MX31_FIRI_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x8c000)
63 #define MX31_GPT1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x90000)
64 #define MX31_EPIT1_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x94000)
65 #define MX31_EPIT2_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0x98000)
66 #define MX31_GPIO3_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xa4000)
67 #define MX31_SCC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xac000)
68 #define MX31_SCM_BASE_ADDR (MX31_AIPS2_BASE_ADDR
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