Searched refs:MSTP202 (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7366.c149 MSTP211, MSTP207, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, enumerator in enum:__anon25786
190 [MSTP202] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
265 CLKDEV_CON_ID("veu0", &mstp_clks[MSTP202]),
H A Dclock-sh7343.c147 MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, enumerator in enum:__anon25783
192 [MSTP202] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
276 CLKDEV_CON_ID("veu0", &mstp_clks[MSTP202]),
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7366.c149 MSTP211, MSTP207, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, enumerator in enum:__anon14093
190 [MSTP202] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
265 CLKDEV_CON_ID("veu0", &mstp_clks[MSTP202]),
H A Dclock-sh7343.c147 MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, enumerator in enum:__anon14090
192 [MSTP202] = MSTP(&div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
276 CLKDEV_CON_ID("veu0", &mstp_clks[MSTP202]),
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-shmobile/
H A Dclock-sh7377.c233 MSTP223, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, enumerator in enum:__anon11878
256 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
332 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
H A Dclock-sh7372.c401 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, enumerator in enum:__anon11875
428 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
516 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-shmobile/
H A Dclock-sh7377.c233 MSTP223, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, enumerator in enum:__anon23571
256 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
332 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
H A Dclock-sh7372.c401 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, enumerator in enum:__anon23568
428 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
516 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */

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