Searched refs:MSP_CPUIF_BASE (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/pmc-sierra/msp71xx/
H A Dmsp_regs.h100 #define MSP_CPUIF_BASE (MSP_MSB_BASE + 0xC00000) macro
469 #define PCI_FLUSH_REG regptr(MSP_CPUIF_BASE + 0x00)
471 #define OCP_ERR1_REG regptr(MSP_CPUIF_BASE + 0x04)
473 #define OCP_ERR2_REG regptr(MSP_CPUIF_BASE + 0x08)
475 #define OCP_STS_REG regptr(MSP_CPUIF_BASE + 0x0C)
477 #define CPUIF_PM_REG regptr(MSP_CPUIF_BASE + 0x10)
479 #define CPUIF_CFG_REG regptr(MSP_CPUIF_BASE + 0x10)
483 #define MSP_CIC_BASE (MSP_CPUIF_BASE + 0x8000)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/pmc-sierra/msp71xx/
H A Dmsp_regs.h100 #define MSP_CPUIF_BASE (MSP_MSB_BASE + 0xC00000) macro
469 #define PCI_FLUSH_REG regptr(MSP_CPUIF_BASE + 0x00)
471 #define OCP_ERR1_REG regptr(MSP_CPUIF_BASE + 0x04)
473 #define OCP_ERR2_REG regptr(MSP_CPUIF_BASE + 0x08)
475 #define OCP_STS_REG regptr(MSP_CPUIF_BASE + 0x0C)
477 #define CPUIF_PM_REG regptr(MSP_CPUIF_BASE + 0x10)
479 #define CPUIF_CFG_REG regptr(MSP_CPUIF_BASE + 0x10)
483 #define MSP_CIC_BASE (MSP_CPUIF_BASE + 0x8000)

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