Searched refs:MSC01E_INT_I8259A (Results 1 - 4 of 4) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mips-boards/ |
| H A D | maltaint.h | 68 #define MSC01E_INT_I8259A MSC01E_INT_MB0 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mips-boards/ |
| H A D | maltaint.h | 68 #define MSC01E_INT_I8259A MSC01E_INT_MB0 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/mti-malta/ |
| H A D | malta-int.c | 368 {MSC01E_INT_I8259A, MSC01_IRQ_LEVEL, 0},
526 set_vi_handler(MSC01E_INT_I8259A, malta_hw0_irqdispatch);
528 setup_irq(MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/mti-malta/ |
| H A D | malta-int.c | 368 {MSC01E_INT_I8259A, MSC01_IRQ_LEVEL, 0},
526 set_vi_handler(MSC01E_INT_I8259A, malta_hw0_irqdispatch);
528 setup_irq(MSC01E_INT_BASE+MSC01E_INT_I8259A, &i8259irq);
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Completed in 67 milliseconds