Searched refs:MM_IO_BASE_INTC1 (Results 1 - 8 of 8) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-bcmring/
H A Dirq.c48 MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
54 MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
115 vic_init((void __iomem *)MM_IO_BASE_INTC1, &bcmring_irq1_chip,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-bcmring/
H A Dirq.c48 MM_IO_BASE_INTC1 + INTCHW_INTENCLEAR);
54 MM_IO_BASE_INTC1 + INTCHW_INTENABLE);
115 vic_init((void __iomem *)MM_IO_BASE_INTC1, &bcmring_irq1_chip,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-bcmring/include/mach/csp/
H A Dmm_io.h133 #define MM_IO_BASE_INTC1 MM_IO_PHYS_TO_VIRT(MM_ADDR_IO_INTC1) macro
H A DintcHw_reg.h41 #define INTCHW_INTC1 ((void *)MM_IO_BASE_INTC1)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-bcmring/include/mach/csp/
H A Dmm_io.h133 #define MM_IO_BASE_INTC1 MM_IO_PHYS_TO_VIRT(MM_ADDR_IO_INTC1) macro
H A DintcHw_reg.h41 #define INTCHW_INTC1 ((void *)MM_IO_BASE_INTC1)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-bcmring/include/mach/
H A Dentry-macro.S36 ldr \base, =(MM_IO_BASE_INTC1)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-bcmring/include/mach/
H A Dentry-macro.S36 ldr \base, =(MM_IO_BASE_INTC1)

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