Searched refs:MMU_PTEH (Results 1 - 12 of 12) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/asm/ |
| H A D | mmu_context_32.h | 33 : "r" (asid), "m" (__m(MMU_PTEH)),
43 : "m" (__m(MMU_PTEH)));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/asm/ |
| H A D | mmu_context_32.h | 33 : "r" (asid), "m" (__m(MMU_PTEH)),
43 : "m" (__m(MMU_PTEH)));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/cpu-sh3/cpu/ |
| H A D | mmu_context.h | 13 #define MMU_PTEH 0xFFFFFFF0 /* Page table entry register HIGH */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/cpu-sh3/cpu/ |
| H A D | mmu_context.h | 13 #define MMU_PTEH 0xFFFFFFF0 /* Page table entry register HIGH */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/cpu-sh4/cpu/ |
| H A D | mmu_context.h | 13 #define MMU_PTEH 0xFF000000 /* Page table entry register HIGH */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/cpu-sh4/cpu/ |
| H A D | mmu_context.h | 13 #define MMU_PTEH 0xFF000000 /* Page table entry register HIGH */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/mm/ |
| H A D | tlb-pteaex.c | 33 __raw_writel(vpn, MMU_PTEH);
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| H A D | tlb-sh3.c | 44 __raw_writel(vpn, MMU_PTEH);
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| H A D | tlb-sh4.c | 32 __raw_writel(vpn, MMU_PTEH);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/mm/ |
| H A D | tlb-pteaex.c | 33 __raw_writel(vpn, MMU_PTEH);
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| H A D | tlb-sh3.c | 44 __raw_writel(vpn, MMU_PTEH);
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| H A D | tlb-sh4.c | 32 __raw_writel(vpn, MMU_PTEH);
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