Searched refs:MISC_CTL (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/vme/bridges/
H A Dvme_ca91cx42.h185 #define MISC_CTL 0x0404 macro
480 * MISC_CTL Register
H A Dvme_ca91cx42.c1669 data = ioread32(ca91cx42_device->base + MISC_CTL);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/vme/bridges/
H A Dvme_ca91cx42.h185 #define MISC_CTL 0x0404 macro
480 * MISC_CTL Register
H A Dvme_ca91cx42.c1669 data = ioread32(ca91cx42_device->base + MISC_CTL);

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