Searched refs:MIPSCPU_INT_IPI1 (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mips-boards/
H A Dmaltaint.h44 #define MIPSCPU_INT_IPI1 MIPSCPU_INT_MB2 /* GIC IPI */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mips-boards/
H A Dmaltaint.h44 #define MIPSCPU_INT_IPI1 MIPSCPU_INT_MB2 /* GIC IPI */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/mti-malta/
H A Dmalta-int.c581 set_vi_handler(MIPSCPU_INT_IPI1, malta_ipi_irqdispatch);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/mti-malta/
H A Dmalta-int.c581 set_vi_handler(MIPSCPU_INT_IPI1, malta_ipi_irqdispatch);

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