Searched refs:MIPSCPU_INT_I8259A (Results 1 - 4 of 4) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mips-boards/ |
| H A D | maltaint.h | 39 #define MIPSCPU_INT_I8259A MIPSCPU_INT_MB0 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mips-boards/ |
| H A D | maltaint.h | 39 #define MIPSCPU_INT_I8259A MIPSCPU_INT_MB0 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/mti-malta/ |
| H A D | malta-int.c | 277 if (irq == MIPSCPU_INT_I8259A)
531 set_vi_handler(MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
534 setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq,
535 (0x100 << MIPSCPU_INT_I8259A));
548 irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
551 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
556 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/mti-malta/ |
| H A D | malta-int.c | 277 if (irq == MIPSCPU_INT_I8259A)
531 set_vi_handler(MIPSCPU_INT_I8259A, malta_hw0_irqdispatch);
534 setup_irq_smtc(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq,
535 (0x100 << MIPSCPU_INT_I8259A));
548 irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A);
551 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
556 setup_irq(MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq);
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Completed in 71 milliseconds