Searched refs:MEMC_CFG_32B_MASK (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/bcm63xx/
H A Dcpu.c276 is_32bits = (val & MEMC_CFG_32B_MASK) ? 0 : 1;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/bcm63xx/
H A Dcpu.c276 is_32bits = (val & MEMC_CFG_32B_MASK) ? 0 : 1;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-bcm63xx/
H A Dbcm63xx_regs.h753 #define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-bcm63xx/
H A Dbcm63xx_regs.h753 #define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT) macro

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