Searched refs:MDMA_D3_CONFIG (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h919 #define MDMA_D3_CONFIG 0xffc01f88 /* Memory DMA Stream 3 Destination Configuration Register */ macro
H A DcdefBF54x_base.h1572 #define bfin_read_MDMA_D3_CONFIG() bfin_read16(MDMA_D3_CONFIG)
1573 #define bfin_write_MDMA_D3_CONFIG(val) bfin_write16(MDMA_D3_CONFIG, val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h919 #define MDMA_D3_CONFIG 0xffc01f88 /* Memory DMA Stream 3 Destination Configuration Register */ macro
H A DcdefBF54x_base.h1572 #define bfin_read_MDMA_D3_CONFIG() bfin_read16(MDMA_D3_CONFIG)
1573 #define bfin_write_MDMA_D3_CONFIG(val) bfin_write16(MDMA_D3_CONFIG, val)

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