Searched refs:MDCNFG_DRI (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1416 #define MDCNFG_DRI Fld (15, 17) /* min. DRAM Refresh Interval/4 */ macro
1420 ((Tcpu)/8 << FShft (MDCNFG_DRI))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1416 #define MDCNFG_DRI Fld (15, 17) /* min. DRAM Refresh Interval/4 */ macro
1420 ((Tcpu)/8 << FShft (MDCNFG_DRI))

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