Searched refs:MDCNFG (Results 1 - 14 of 14) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/
H A Dcpu-sa1100.c58 * MDCNFG 0xA0000000 DRAM config
154 MDCNFG |= MDCNFG_CDB2;
162 MDCNFG = settings->mdcnfg;
169 MDCNFG |= MDCNFG_CDB2;
177 MDCNFG = settings->mdcnfg;
H A Dcpu-sa1110.c160 sd->mdcnfg = MDCNFG & 0x007f007f;
186 printk("MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n",
277 1: str %3, [%1, #0] @ MDCNFG \n\
289 : "r" (&MDCNFG), "r" (&PPCR), "0" (sd.mdcnfg),
H A Dsleep.S104 ldr r9, =MDCNFG
132 @ Step 4 clear DE bis in MDCNFG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/
H A Dcpu-sa1100.c58 * MDCNFG 0xA0000000 DRAM config
154 MDCNFG |= MDCNFG_CDB2;
162 MDCNFG = settings->mdcnfg;
169 MDCNFG |= MDCNFG_CDB2;
177 MDCNFG = settings->mdcnfg;
H A Dcpu-sa1110.c160 sd->mdcnfg = MDCNFG & 0x007f007f;
186 printk("MDCNFG: %08x MDREFR: %08x MDCAS0: %08x MDCAS1: %08x MDCAS2: %08x\n",
277 1: str %3, [%1, #0] @ MDCNFG \n\
289 : "r" (&MDCNFG), "r" (&PPCR), "0" (sd.mdcnfg),
H A Dsleep.S104 ldr r9, =MDCNFG
132 @ Step 4 clear DE bis in MDCNFG
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/include/mach/
H A Dpxa2xx-regs.h34 #define MDCNFG __REG(0x48000000) /* SDRAM Configuration Register 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/include/mach/
H A Dpxa2xx-regs.h34 #define MDCNFG __REG(0x48000000) /* SDRAM Configuration Register 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pxa/
H A Dcpufreq-pxa2xx.c245 uint32_t mdcnfg = MDCNFG;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pxa/
H A Dcpufreq-pxa2xx.c245 uint32_t mdcnfg = MDCNFG;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/common/
H A Dsa1111.c743 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
744 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/common/
H A Dsa1111.c743 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
744 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1368 * MDCNFG Memory system: Dynamic Random-Access Memory (DRAM)
1386 #define MDCNFG __REG(0xA0000000) /* DRAM CoNFiGuration reg. */ macro
1391 /* SA1100 MDCNFG values */
1422 /* SA1110 MDCNFG values */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h1368 * MDCNFG Memory system: Dynamic Random-Access Memory (DRAM)
1386 #define MDCNFG __REG(0xA0000000) /* DRAM CoNFiGuration reg. */ macro
1391 /* SA1100 MDCNFG values */
1422 /* SA1110 MDCNFG values */

Completed in 264 milliseconds