Searched refs:MCFSIM_ICR8 (Results 1 - 10 of 10) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m68k/include/asm/
H A Dm5206sim.h27 #define MCFSIM_ICR8 0x1b /* Intr Ctrl reg 8 (r/w) */ macro
117 #define MCFSIM_SWDICR MCFSIM_ICR8 /* Watchdog timer ICR */
H A Dm5307sim.h39 #define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ macro
124 #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
H A Dm5407sim.h39 #define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ macro
96 #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
H A Dm5249sim.h35 #define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ macro
70 #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
H A Dm532xsim.h41 #define MCFSIM_ICR8 0xFC048048 macro
56 #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m68k/include/asm/
H A Dm5206sim.h27 #define MCFSIM_ICR8 0x1b /* Intr Ctrl reg 8 (r/w) */ macro
117 #define MCFSIM_SWDICR MCFSIM_ICR8 /* Watchdog timer ICR */
H A Dm5307sim.h39 #define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ macro
124 #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
H A Dm5407sim.h39 #define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ macro
96 #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
H A Dm5249sim.h35 #define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ macro
70 #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
H A Dm532xsim.h41 #define MCFSIM_ICR8 0xFC048048 macro
56 #define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */

Completed in 108 milliseconds