Searched refs:MCFSIM_DMR1 (Results 1 - 16 of 16) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m68k/include/asm/
H A Dm5206sim.h53 #define MCFSIM_DMR1 0x5c /* DRAM 1 Mask reg (r/w) */ macro
H A Dm5307sim.h91 #define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ macro
H A Dm5407sim.h74 #define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ macro
H A Dm527xsim.h45 #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ macro
55 #define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */ macro
H A Dm523xsim.h42 #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ macro
H A Dm5249sim.h57 #define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ macro
H A Dm528xsim.h42 #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m68k/include/asm/
H A Dm5206sim.h53 #define MCFSIM_DMR1 0x5c /* DRAM 1 Mask reg (r/w) */ macro
H A Dm5307sim.h91 #define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ macro
H A Dm5407sim.h74 #define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ macro
H A Dm527xsim.h45 #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ macro
55 #define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */ macro
H A Dm523xsim.h42 #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ macro
H A Dm5249sim.h57 #define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ macro
H A Dm528xsim.h42 #define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m68knommu/platform/coldfire/
H A Dhead.S51 movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m68knommu/platform/coldfire/
H A Dhead.S51 movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */

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