Searched refs:MCFSIM_DACR0 (Results 1 - 12 of 12) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m68k/include/asm/
H A Dm5307sim.h88 #define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ macro
H A Dm5407sim.h71 #define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ macro
H A Dm523xsim.h39 #define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ macro
H A Dm5249sim.h54 #define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ macro
H A Dm527xsim.h42 #define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ macro
H A Dm528xsim.h39 #define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m68k/include/asm/
H A Dm5307sim.h88 #define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ macro
H A Dm5407sim.h71 #define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ macro
H A Dm523xsim.h39 #define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ macro
H A Dm5249sim.h54 #define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ macro
H A Dm527xsim.h42 #define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ macro
H A Dm528xsim.h39 #define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ macro

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