Searched refs:MC0 (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/include/asm/
H A Dbfin_can.h183 #define MC0 0x0001 /* Enable Mailbox 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/include/asm/
H A Dbfin_can.h183 #define MC0 0x0001 /* Enable Mailbox 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/
H A Depic100.c202 MC0=80, /* Multicast filter table. */ enumerator in enum:epic_registers
1404 outw(((u16 *)mc_filter)[i], ioaddr + MC0 + i*4);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/
H A Depic100.c202 MC0=80, /* Multicast filter table. */ enumerator in enum:epic_registers
1404 outw(((u16 *)mc_filter)[i], ioaddr + MC0 + i*4);

Completed in 84 milliseconds