Searched refs:M6811_RDRF (Results 1 - 9 of 9) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/m68hc11/
H A Ddv-m68hc11sio.c279 if (cpu->ios[M6811_SCSR] & M6811_RDRF)
282 cpu->ios[M6811_SCSR] |= M6811_RDRF;
399 { M6811_RDRF, "RDRF ", "Receive Data Register Full" },
512 & (M6811_RDRF | M6811_IDLE | M6811_OR | M6811_NF | M6811_FE);
607 val &= ~(M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF);
609 & (M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF));
H A Dinterrupts.c63 { M6811_INT_SCI, M6811_SCSR, M6811_RDRF, M6811_SCCR2, M6811_RIE },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/m68hc11/
H A Ddv-m68hc11sio.c279 if (cpu->ios[M6811_SCSR] & M6811_RDRF)
282 cpu->ios[M6811_SCSR] |= M6811_RDRF;
399 { M6811_RDRF, "RDRF ", "Receive Data Register Full" },
512 & (M6811_RDRF | M6811_IDLE | M6811_OR | M6811_NF | M6811_FE);
607 val &= ~(M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF);
609 & (M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF));
H A Dinterrupts.c63 { M6811_INT_SCI, M6811_SCSR, M6811_RDRF, M6811_SCCR2, M6811_RIE },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/m68hc11/
H A Ddv-m68hc11sio.c279 if (cpu->ios[M6811_SCSR] & M6811_RDRF)
282 cpu->ios[M6811_SCSR] |= M6811_RDRF;
399 { M6811_RDRF, "RDRF ", "Receive Data Register Full" },
512 & (M6811_RDRF | M6811_IDLE | M6811_OR | M6811_NF | M6811_FE);
607 val &= ~(M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF);
609 & (M6811_RDRF|M6811_IDLE|M6811_OR|M6811_NF|M6811_NF));
H A Dinterrupts.c63 { M6811_INT_SCI, M6811_SCSR, M6811_RDRF, M6811_SCCR2, M6811_RIE },
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/include/opcode/
H A Dm68hc11.h159 #define M6811_RDRF 0x20 /* Receive Data Register Full */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/include/opcode/
H A Dm68hc11.h159 #define M6811_RDRF 0x20 /* Receive Data Register Full */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/include/opcode/
H A Dm68hc11.h159 #define M6811_RDRF 0x20 /* Receive Data Register Full */ macro

Completed in 261 milliseconds