Searched refs:M32700UT_LCD_BASE (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m32r/include/asm/m32700ut/
H A Dm32700ut_lcd.h20 #define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */) macro
22 #define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET) macro
38 #define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)
43 #define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)
44 #define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)
45 #define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)
46 #define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)
47 #define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)
48 #define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)
49 #define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m32r/include/asm/m32700ut/
H A Dm32700ut_lcd.h20 #define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */) macro
22 #define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET) macro
38 #define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)
43 #define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)
44 #define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)
45 #define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)
46 #define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)
47 #define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)
48 #define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)
49 #define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE
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