Searched refs:LSI3_CTL (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/vme/bridges/
H A Dvme_ca91cx42.h97 #define LSI3_CTL 0x013C macro
122 static const int CA91CX42_LSI_CTL[] = { LSI0_CTL, LSI1_CTL, LSI2_CTL, LSI3_CTL,
H A Dvme_ca91cx42.c1761 iowrite32(0x00800000, bridge->base + LSI3_CTL);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/vme/bridges/
H A Dvme_ca91cx42.h97 #define LSI3_CTL 0x013C macro
122 static const int CA91CX42_LSI_CTL[] = { LSI0_CTL, LSI1_CTL, LSI2_CTL, LSI3_CTL,
H A Dvme_ca91cx42.c1761 iowrite32(0x00800000, bridge->base + LSI3_CTL);

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