Searched refs:L2X0_INV_WAY (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/include/asm/hardware/
H A Dcache-l2x0.h43 #define L2X0_INV_WAY 0x77C macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/include/asm/hardware/
H A Dcache-l2x0.h43 #define L2X0_INV_WAY 0x77C macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-brcm/
H A Dcache-l310.c154 writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY);
155 cache_wait(base + L2X0_INV_WAY, l2x0_way_mask);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-brcm/
H A Dcache-l310.c154 writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY);
155 cache_wait(base + L2X0_INV_WAY, l2x0_way_mask);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mm/
H A Dcache-l2x0.c112 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
113 cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mm/
H A Dcache-l2x0.c112 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
113 cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);

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