Searched refs:KSEG0 (Results 1 - 20 of 20) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m32r/include/asm/
H A Daddrspace.h17 #define KSEG0 0x80000000 macro
22 #define K0BASE KSEG0
34 * Returns the physical address of a KSEG0/KSEG1 address
46 #define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0))
51 #define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m32r/include/asm/
H A Daddrspace.h17 #define KSEG0 0x80000000 macro
22 #define K0BASE KSEG0
34 * Returns the physical address of a KSEG0/KSEG1 address
46 #define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0))
51 #define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/mm/
H A Dc-r3k.c35 p = (volatile unsigned long *) KSEG0;
70 p = (volatile unsigned long *) KSEG0;
111 if (size > icache_size || KSEGX(start) != KSEG0) {
112 start = KSEG0;
168 if (size > dcache_size || KSEGX(start) != KSEG0) {
169 start = KSEG0;
225 r3k_flush_dcache_range(KSEG0, KSEG0 + dcache_size);
226 r3k_flush_icache_range(KSEG0, KSEG0
[all...]
H A Dtlb-r3k.c109 write_c0_entryhi(KSEG0);
146 write_c0_entryhi(KSEG0);
178 write_c0_entryhi(KSEG0);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/mm/
H A Dc-r3k.c35 p = (volatile unsigned long *) KSEG0;
70 p = (volatile unsigned long *) KSEG0;
111 if (size > icache_size || KSEGX(start) != KSEG0) {
112 start = KSEG0;
168 if (size > dcache_size || KSEGX(start) != KSEG0) {
169 start = KSEG0;
225 r3k_flush_dcache_range(KSEG0, KSEG0 + dcache_size);
226 r3k_flush_icache_range(KSEG0, KSEG0
[all...]
H A Dtlb-r3k.c109 write_c0_entryhi(KSEG0);
146 write_c0_entryhi(KSEG0);
178 write_c0_entryhi(KSEG0);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/lzma-loader/
H A Ddecompress.c40 #define KSEG0 0x80000000 macro
61 unsigned long start = KSEG0;
72 unsigned long start = KSEG0;
H A Dhead.S10 #define KSEG0 0x80000000 define
116 li t0,KSEG0 /* Just an address for the first $ line */
161 li t0,KSEG0 /* Just an address for the first $ line */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/lzma-loader/
H A Ddecompress.c40 #define KSEG0 0x80000000 macro
61 unsigned long start = KSEG0;
72 unsigned long start = KSEG0;
H A Dhead.S10 #define KSEG0 0x80000000 define
116 li t0,KSEG0 /* Just an address for the first $ line */
161 li t0,KSEG0 /* Just an address for the first $ line */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/lzma-loader/
H A Ddecompress.c40 #define KSEG0 0x80000000 macro
61 unsigned long start = KSEG0;
72 unsigned long start = KSEG0;
H A Dhead.S10 #define KSEG0 0x80000000 define
116 li t0,KSEG0 /* Just an address for the first $ line */
161 li t0,KSEG0 /* Just an address for the first $ line */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
88 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
98 #define KSEG0 0x80000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/
H A Daddrspace.h80 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
88 #define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
98 #define KSEG0 0x80000000 macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-pnx8550/
H A Dkernel-entry-init.h216 la t1, KSEG0 /* T1 = cached memory base address */
254 la t1, KSEG0 /* T1 = cached memory base address */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-pnx8550/
H A Dkernel-entry-init.h216 la t1, KSEG0 /* T1 = cached memory base address */
254 la t1, KSEG0 /* T1 = cached memory base address */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/include/
H A Dmipsinc.h189 #undef KSEG0 macro
194 #define KSEG0 0x80000000 macro
210 #define KSEG0ADDR(a) ((_ULCAST_(a) & PHYSADDR_MASK) | KSEG0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/shared/
H A Dboot.S385 2: li t0,KSEG0 # Just an address for the first $ line
428 li t0,KSEG0 # Just an address for the first $ line
622 or v0,KSEG0
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/kernel/
H A Drtlx.c210 if ((unsigned int)*p < KSEG0) {
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/kernel/
H A Drtlx.c210 if ((unsigned int)*p < KSEG0) {

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