/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/lzma-loader/ |
H A D | decompress.c | 46 #define Index_Writeback_Inv_D 0x01 macro 76 cache_unroll(start,Index_Writeback_Inv_D);
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H A D | head.S | 38 #define Index_Writeback_Inv_D 0x01 define 120 3: cache Index_Writeback_Inv_D,0(t0)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/lzma-loader/ |
H A D | decompress.c | 46 #define Index_Writeback_Inv_D 0x01 macro 76 cache_unroll(start,Index_Writeback_Inv_D);
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H A D | head.S | 38 #define Index_Writeback_Inv_D 0x01 define 120 3: cache Index_Writeback_Inv_D,0(t0)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/lzma-loader/ |
H A D | decompress.c | 46 #define Index_Writeback_Inv_D 0x01 macro 76 cache_unroll(start,Index_Writeback_Inv_D);
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H A D | head.S | 38 #define Index_Writeback_Inv_D 0x01 define 120 3: cache Index_Writeback_Inv_D,0(t0)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/ |
H A D | r4kcache.h | 153 cache_op(Index_Writeback_Inv_D, addr); 396 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16) 399 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32) 402 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64) 407 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) 408 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32)
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H A D | cacheops.h | 18 #define Index_Writeback_Inv_D 0x01 macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/ |
H A D | r4kcache.h | 153 cache_op(Index_Writeback_Inv_D, addr); 396 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16) 399 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32) 402 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64) 407 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) 408 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32)
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H A D | cacheops.h | 18 #define Index_Writeback_Inv_D 0x01 macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-pnx8550/ |
H A D | kernel-entry-init.h | 238 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 240 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 242 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 244 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-pnx8550/ |
H A D | kernel-entry-init.h | 238 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 240 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 242 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \ 244 .word CACHE_OPC | (9 << 21) | (Index_Writeback_Inv_D << 16) | \
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/txx9/generic/ |
H A D | setup.c | 207 cache_op(Index_Writeback_Inv_D, addr | 0); 208 cache_op(Index_Writeback_Inv_D, addr | 1); 209 cache_op(Index_Writeback_Inv_D, addr | 2); 210 cache_op(Index_Writeback_Inv_D, addr | 3); 256 cache_op(Index_Writeback_Inv_D, addr | 0); 257 cache_op(Index_Writeback_Inv_D, addr | 1);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/txx9/generic/ |
H A D | setup.c | 207 cache_op(Index_Writeback_Inv_D, addr | 0); 208 cache_op(Index_Writeback_Inv_D, addr | 1); 209 cache_op(Index_Writeback_Inv_D, addr | 2); 210 cache_op(Index_Writeback_Inv_D, addr | 3); 256 cache_op(Index_Writeback_Inv_D, addr | 0); 257 cache_op(Index_Writeback_Inv_D, addr | 1);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/src/ |
H A D | bcmcore_l1cache.S | 356 cache Index_Writeback_Inv_D,0(t1)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/include/ |
H A D | mipsinc.h | 221 #define Index_Writeback_Inv_D 0x01 macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/shared/ |
H A D | min_osl.c | 131 cache_op(start, Index_Writeback_Inv_D);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/include/ |
H A D | sbmips.h | 609 #define Index_Writeback_Inv_D 0x1 /* 0 1 */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/include/ |
H A D | r5kc0.h | 236 #define Index_Writeback_Inv_D 0x1 /* 0 1 */ macro
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H A D | sbmips.h | 607 #define Index_Writeback_Inv_D 0x1 /* 0 1 */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/include/ |
H A D | r5kc0.h | 236 #define Index_Writeback_Inv_D 0x1 /* 0 1 */ macro
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H A D | sbmips.h | 607 #define Index_Writeback_Inv_D 0x1 /* 0 1 */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/ |
H A D | sbmips.h | 974 #define Index_Writeback_Inv_D 0x1 /* 0 1 */ macro
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