Searched refs:Index_Invalidate_I (Results 1 - 25 of 25) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/mm/
H A Dcex-sb1.S124 cache Index_Invalidate_I,(0<<13)(k0)
125 cache Index_Invalidate_I,(1<<13)(k0)
126 cache Index_Invalidate_I,(2<<13)(k0)
127 cache Index_Invalidate_I,(3<<13)(k0)
H A Dc-r4k.c188 cache32_unroll32(addr|ws, Index_Invalidate_I);
193 cache32_unroll32(addr|ws, Index_Invalidate_I);
219 cache32_unroll32(addr|ws, Index_Invalidate_I);
224 cache32_unroll32(addr|ws, Index_Invalidate_I);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/mm/
H A Dcex-sb1.S124 cache Index_Invalidate_I,(0<<13)(k0)
125 cache Index_Invalidate_I,(1<<13)(k0)
126 cache Index_Invalidate_I,(2<<13)(k0)
127 cache Index_Invalidate_I,(3<<13)(k0)
H A Dc-r4k.c188 cache32_unroll32(addr|ws, Index_Invalidate_I);
193 cache32_unroll32(addr|ws, Index_Invalidate_I);
219 cache32_unroll32(addr|ws, Index_Invalidate_I);
224 cache32_unroll32(addr|ws, Index_Invalidate_I);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/lzma-loader/
H A Ddecompress.c45 #define Index_Invalidate_I 0x00 macro
65 cache_unroll(start,Index_Invalidate_I);
H A Dhead.S37 #define Index_Invalidate_I 0x00 define
165 1: cache Index_Invalidate_I,0(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/lzma-loader/
H A Ddecompress.c45 #define Index_Invalidate_I 0x00 macro
65 cache_unroll(start,Index_Invalidate_I);
H A Dhead.S37 #define Index_Invalidate_I 0x00 define
165 1: cache Index_Invalidate_I,0(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/lzma-loader/
H A Ddecompress.c45 #define Index_Invalidate_I 0x00 macro
65 cache_unroll(start,Index_Invalidate_I);
H A Dhead.S37 #define Index_Invalidate_I 0x00 define
165 1: cache Index_Invalidate_I,0(t0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/
H A Dcacheops.h17 #define Index_Invalidate_I 0x00 macro
H A Dr4kcache.h146 cache_op(Index_Invalidate_I, addr);
397 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16)
400 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32)
403 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/
H A Dcacheops.h17 #define Index_Invalidate_I 0x00 macro
H A Dr4kcache.h146 cache_op(Index_Invalidate_I, addr);
397 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16)
400 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32)
403 __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/mach-pnx8550/
H A Dkernel-entry-init.h155 cache Index_Invalidate_I, 0(t0) variable
203 .word CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
205 .word CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/mach-pnx8550/
H A Dkernel-entry-init.h155 cache Index_Invalidate_I, 0(t0) variable
203 .word CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
205 .word CACHE_OPC | (9 << 21) | (Index_Invalidate_I << 16) | \
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/include/
H A Dmipsinc.h216 #ifndef Index_Invalidate_I
220 #define Index_Invalidate_I 0x00 macro
251 #endif /* !Index_Invalidate_I */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/src/
H A Dbcmcore_l1cache.S272 cache Index_Invalidate_I,0(t1)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/shared/
H A Dmin_osl.c145 cache_op(start, Index_Invalidate_I);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/include/
H A Dsbmips.h608 #define Index_Invalidate_I 0x0 /* 0 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/include/
H A Dr5kc0.h235 #define Index_Invalidate_I 0x0 /* 0 0 */ macro
H A Dsbmips.h606 #define Index_Invalidate_I 0x0 /* 0 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/include/
H A Dr5kc0.h235 #define Index_Invalidate_I 0x0 /* 0 0 */ macro
H A Dsbmips.h606 #define Index_Invalidate_I 0x0 /* 0 0 */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/
H A Dsbmips.h973 #define Index_Invalidate_I 0x0 /* 0 0 */ macro

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