Searched refs:IXA (Results 1 - 3 of 3) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/opcodes/
H A Di370-opc.c432 fit on a single line. These flags are set up so that e.g. IXA means
453 #define IXA IESA | I370_OPCODE_370_XA
454 #define I370 IXA | I370_OPCODE_370
483 { "upt", 2, {{E(0x0102), 0}}, {{E_MASK, 0}}, IXA, {0} },
494 { "basr", 2, {{RR(0x0d,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
495 { "bassm", 2, {{RR(0x0c,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
496 { "bsm", 2, {{RR(0x0b,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
571 { "dxr", 4, {{RRE(0xb22d,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
574 { "epar", 4, {{RRE(0xb226,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1} },
576 { "esar", 4, {{RRE(0xb227,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R
448 #define IXA macro
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/opcodes/
H A Di370-opc.c432 fit on a single line. These flags are set up so that e.g. IXA means
453 #define IXA IESA | I370_OPCODE_370_XA
454 #define I370 IXA | I370_OPCODE_370
483 { "upt", 2, {{E(0x0102), 0}}, {{E_MASK, 0}}, IXA, {0} },
494 { "basr", 2, {{RR(0x0d,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
495 { "bassm", 2, {{RR(0x0c,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
496 { "bsm", 2, {{RR(0x0b,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
571 { "dxr", 4, {{RRE(0xb22d,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
574 { "epar", 4, {{RRE(0xb226,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1} },
576 { "esar", 4, {{RRE(0xb227,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R
448 #define IXA macro
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/opcodes/
H A Di370-opc.c432 fit on a single line. These flags are set up so that e.g. IXA means
453 #define IXA IESA | I370_OPCODE_370_XA
454 #define I370 IXA | I370_OPCODE_370
483 { "upt", 2, {{E(0x0102), 0}}, {{E_MASK, 0}}, IXA, {0} },
494 { "basr", 2, {{RR(0x0d,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
495 { "bassm", 2, {{RR(0x0c,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
496 { "bsm", 2, {{RR(0x0b,0,0), 0}}, {{RR_MASK, 0}}, IXA, {RR_R1, RR_R2} },
571 { "dxr", 4, {{RRE(0xb22d,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1, RRE_R2} },
574 { "epar", 4, {{RRE(0xb226,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R1} },
576 { "esar", 4, {{RRE(0xb227,0,0), 0}}, {{RRE_MASK, 0}}, IXA, {RRE_R
448 #define IXA macro
[all...]

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