Searched refs:IRQ_MIR_REG_OFFSET (Results 1 - 8 of 8) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap1/ |
| H A D | irq.c | 86 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
88 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
96 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
98 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
208 irq_bank_writel(~0x0, i, IRQ_MIR_REG_OFFSET);
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| H A D | ams-delta-fiq-handler.S | 100 ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask
116 str r8, [r12, #IRQ_MIR_REG_OFFSET]
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap1/ |
| H A D | irq.c | 86 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
88 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
96 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
98 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET);
208 irq_bank_writel(~0x0, i, IRQ_MIR_REG_OFFSET);
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| H A D | ams-delta-fiq-handler.S | 100 ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask
116 str r8, [r12, #IRQ_MIR_REG_OFFSET]
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap1/include/mach/ |
| H A D | entry-macro.S | 43 ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET]
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap1/include/mach/ |
| H A D | entry-macro.S | 43 ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET]
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-omap/include/plat/ |
| H A D | hardware.h | 168 #define IRQ_MIR_REG_OFFSET 0x04 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-omap/include/plat/ |
| H A D | hardware.h | 168 #define IRQ_MIR_REG_OFFSET 0x04 macro
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