/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/xtensa/platforms/xt2000/include/platform/ |
H A D | serial.h | 22 #define DUART16552_1_ADDR IOADDR(0x0d050020) /* channel 1 */ 23 #define DUART16552_2_ADDR IOADDR(0x0d050000) /* channel 2 */
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H A D | hardware.h | 36 #define SONIC83934_ADDR IOADDR(0x0d030000) 52 #define XT2000_LED_ADDR IOADDR(0x0d040000)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/xtensa/platforms/xt2000/include/platform/ |
H A D | serial.h | 22 #define DUART16552_1_ADDR IOADDR(0x0d050020) /* channel 1 */ 23 #define DUART16552_2_ADDR IOADDR(0x0d050000) /* channel 2 */
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H A D | hardware.h | 36 #define SONIC83934_ADDR IOADDR(0x0d030000) 52 #define XT2000_LED_ADDR IOADDR(0x0d040000)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/sibyte/common/ |
H A D | sb_tbprof.c | 160 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1)); 161 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); 172 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG0)); 177 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG1)); 184 IOADDR(A_SCD_PERF_CNT_CFG)); 186 __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1)); 188 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 189 __raw_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG)); 203 IOADDR(A_SCD_TRACE_CFG)); 209 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_REA [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/sibyte/common/ |
H A D | sb_tbprof.c | 160 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1)); 161 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); 172 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG0)); 177 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG1)); 184 IOADDR(A_SCD_PERF_CNT_CFG)); 186 __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1)); 188 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 189 __raw_writeq(tb_options, IOADDR(A_SCD_TRACE_CFG)); 203 IOADDR(A_SCD_TRACE_CFG)); 209 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_REA [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/sibyte/bcm1480/ |
H A D | smp.c | 39 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 40 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 41 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 42 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 46 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 47 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 48 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 49 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 53 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 54 IOADDR(A_BCM1480_IMR_CPU1_BAS [all...] |
H A D | irq.c | 88 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 90 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 105 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 107 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 135 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 140 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 145 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 147 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 187 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq], 198 __raw_writeq(pending, IOADDR(A_BCM1480_IMR_REGISTE [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/sibyte/bcm1480/ |
H A D | smp.c | 39 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 40 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 41 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 42 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU), 46 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 47 IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 48 IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 49 IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU), 53 IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU), 54 IOADDR(A_BCM1480_IMR_CPU1_BAS [all...] |
H A D | irq.c | 88 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 90 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 105 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 107 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + hl_spacing)); 135 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 140 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(old_cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 145 cur_ints = ____raw_readq(IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 147 ____raw_writeq(cur_ints, IOADDR(A_BCM1480_IMR_MAPPER(cpu) + R_BCM1480_IMR_INTERRUPT_MASK_H + (k*BCM1480_IMR_HL_SPACING))); 187 pending = __raw_readq(IOADDR(A_BCM1480_IMR_REGISTER(bcm1480_irq_owner[irq], 198 __raw_writeq(pending, IOADDR(A_BCM1480_IMR_REGISTE [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/kernel/ |
H A D | csrc-sb1250.c | 40 count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); 59 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, 62 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, 65 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
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H A D | csrc-bcm1480.c | 33 return (cycle_t) __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT)); 50 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
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H A D | cevt-bcm1480.c | 48 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 49 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 76 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 77 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 99 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 141 IOADDR(A_BCM1480_IMR_REGISTER(cpu,
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H A D | cevt-sb1250.c | 46 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 47 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 74 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 75 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 97 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 140 IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/kernel/ |
H A D | csrc-sb1250.c | 40 count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT)))); 59 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, 62 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, 65 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
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H A D | csrc-bcm1480.c | 33 return (cycle_t) __raw_readq(IOADDR(A_SCD_ZBBUS_CYCLE_COUNT)); 50 plldiv = G_BCM1480_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
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H A D | cevt-bcm1480.c | 48 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 49 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 76 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 77 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 99 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 141 IOADDR(A_BCM1480_IMR_REGISTER(cpu,
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H A D | cevt-sb1250.c | 46 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 47 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 74 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 75 init = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)); 97 cfg = IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)); 140 IOADDR(A_IMR_REGISTER(cpu, R_IMR_INTERRUPT_MAP_BASE) +
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/sibyte/sb1250/ |
H A D | irq.c | 82 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + 85 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 96 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + 99 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 121 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(old_cpu) + 127 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(old_cpu) + 133 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + 136 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 169 pending = __raw_readq(IOADDR(A_IMR_REGISTER(sb1250_irq_owner[irq], 186 IOADDR(A_IMR_REGISTE [all...] |
H A D | bus_watcher.c | 83 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); 86 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); 94 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS)); 95 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); 186 csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG)); 187 csr_out32(M_SCD_TRACE_CFG_START_READ, IOADDR(A_SCD_TRACE_CFG)); 191 (long long)__raw_readq(IOADDR(A_SCD_TRACE_READ))); 193 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 194 csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG)); 198 stats->status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATU [all...] |
H A D | smp.c | 33 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU), 34 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU) 38 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU), 39 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU) 43 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU), 44 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/sibyte/sb1250/ |
H A D | irq.c | 82 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + 85 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 96 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + 99 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 121 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(old_cpu) + 127 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(old_cpu) + 133 cur_ints = ____raw_readq(IOADDR(A_IMR_MAPPER(cpu) + 136 ____raw_writeq(cur_ints, IOADDR(A_IMR_MAPPER(cpu) + 169 pending = __raw_readq(IOADDR(A_IMR_REGISTER(sb1250_irq_owner[irq], 186 IOADDR(A_IMR_REGISTE [all...] |
H A D | bus_watcher.c | 83 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS)); 86 status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATUS_DEBUG)); 94 l2_err = csr_in32(IOADDR(A_BUS_L2_ERRORS)); 95 memio_err = csr_in32(IOADDR(A_BUS_MEM_IO_ERRORS)); 186 csr_out32(M_SCD_TRACE_CFG_FREEZE, IOADDR(A_SCD_TRACE_CFG)); 187 csr_out32(M_SCD_TRACE_CFG_START_READ, IOADDR(A_SCD_TRACE_CFG)); 191 (long long)__raw_readq(IOADDR(A_SCD_TRACE_READ))); 193 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 194 csr_out32(M_SCD_TRACE_CFG_START, IOADDR(A_SCD_TRACE_CFG)); 198 stats->status = csr_in32(IOADDR(A_SCD_BUS_ERR_STATU [all...] |
H A D | smp.c | 33 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU), 34 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU) 38 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU), 39 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU) 43 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU), 44 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/sibyte/ |
H A D | sb1250.h | 66 #define IOADDR(a) ((void __iomem *)(IO_BASE + (a))) macro
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