Searched refs:I370_OPERAND_BASE (Results 1 - 9 of 9) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/include/opcode/ |
| H A D | i370.h | 209 #define I370_OPERAND_BASE (0x02)
208 #define I370_OPERAND_BASE macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/include/opcode/ |
| H A D | i370.h | 209 #define I370_OPERAND_BASE (0x02)
208 #define I370_OPERAND_BASE macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/include/opcode/ |
| H A D | i370.h | 209 #define I370_OPERAND_BASE (0x02)
208 #define I370_OPERAND_BASE macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/opcodes/ |
| H A D | i370-dis.c | 142 else if ((operand->flags & I370_OPERAND_BASE) != 0)
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| H A D | i370-opc.c | 90 I370_OPERAND_BASE base register; if present, must name a register
156 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE, "RX B2"},
181 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "RS B2"},
232 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "S B2" },
257 { 4, 12, insert_ss_b2, extract_ss_b2, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "SS B2" },
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/opcodes/ |
| H A D | i370-dis.c | 142 else if ((operand->flags & I370_OPERAND_BASE) != 0)
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| H A D | i370-opc.c | 90 I370_OPERAND_BASE base register; if present, must name a register
156 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE, "RX B2"},
181 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "RS B2"},
232 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "S B2" },
257 { 4, 12, insert_ss_b2, extract_ss_b2, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "SS B2" },
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/opcodes/ |
| H A D | i370-dis.c | 142 else if ((operand->flags & I370_OPERAND_BASE) != 0)
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| H A D | i370-opc.c | 90 I370_OPERAND_BASE base register; if present, must name a register
156 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE, "RX B2"},
181 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "RS B2"},
232 { 4, 12, 0, 0, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "S B2" },
257 { 4, 12, insert_ss_b2, extract_ss_b2, I370_OPERAND_GPR | I370_OPERAND_BASE | I370_OPERAND_SBASE, "SS B2" },
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