Searched refs:Hit_Invalidate_D (Results 1 - 11 of 11) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/ |
H A D | cacheops.h | 28 #define Hit_Invalidate_D 0x11 macro
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H A D | r4kcache.h | 179 cache_op(Hit_Invalidate_D, addr); 407 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) 408 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32) 441 __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/ |
H A D | cacheops.h | 28 #define Hit_Invalidate_D 0x11 macro
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H A D | r4kcache.h | 179 cache_op(Hit_Invalidate_D, addr); 407 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) 408 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32) 441 __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/include/ |
H A D | mipsinc.h | 235 #define Hit_Invalidate_D 0x11 macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/bcmcore/include/ |
H A D | sbmips.h | 623 #define Hit_Invalidate_D 0x11 /* 4 1 */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/include/ |
H A D | r5kc0.h | 246 #define Hit_Invalidate_D 0x11 /* 4 1 */ macro
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H A D | sbmips.h | 621 #define Hit_Invalidate_D 0x11 /* 4 1 */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/include/ |
H A D | r5kc0.h | 246 #define Hit_Invalidate_D 0x11 /* 4 1 */ macro
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H A D | sbmips.h | 621 #define Hit_Invalidate_D 0x11 /* 4 1 */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/ |
H A D | sbmips.h | 988 #define Hit_Invalidate_D 0x11 /* 4 1 */ macro
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